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Home | Seminars and Symposia | Past seminars/symposia: Monday, November 26, 2012

DTC Seminar Series

SoCs Accelerating Stochastic Simulation of Large-Scale Biomolecular Networks

by

Elias Manolakos
Wyss Institute for Biologically Inspired Engineering
Harvard University
Department of Informatics and Telecommunications
University of Athens, Greece

Monday, November 26, 2012
10:30 a.m. reception
11:00 a.m. seminar

401/402 Walter Library

ManolakosRapid advances in systems biology call for the development of innovative methods and tools to help us understand the complex dynamics of large-scale biomolecular networks, unravel the "epigenetic landscape" of cells and tissues and predict how it can be manipulated by external intervention strategies (e.g. in silico drug design). Stochastic simulation is the method of choice for approximating the dynamics of biomolecular networks while accounting for their inherently stochastic behavior, due to intrinsic and extrinsic noise. However, Stochastic Simulation Algorithms (SSA) are computationally expensive and therefore only small scale networks can be simulated in reasonable amount of time using a modern computer. The pressing demand for simulating "biological circuits" of increasing complexity (e.g. systems of many cross-talking pathways, whole-species gene regulatory networks, interacting cells through diffusible species etc.) under different conditions motivates the need for developing efficient parallel processing solutions that can deliver scalable performance without sacrificing simulation accuracy. We present the design of a scalable Multiprocessor System on Chip architecture that implements Gillespie's First Reaction Method (FRM-SSA) in reconfigurable hardware. Our MPSoC architecture can deliver performance (Mega-Reactions/sec) and throughput (MReaction cycles/sec) that is increasing linearly with the number of processors. It can handle the simulation of very large biomolecular networks with up to m = 16K reactions (of up to the 3rd order) using moderate size FPGAs. The MPSoCs can either use the available processors to partition the reactions of a Single Simulation run and execute them In Parallel (SSIP mode), or to execute Multiple independent Simulation runs In Parallel (MSIP mode). We have synthesized and verified several MPSoC instances with up to N=8 Processing Elements for Xilinx Virtex 5 and Virtex 6 FPGAs, reaching clock frequencies as high as 320 MHz and delivering performance that exceeds by more than 2 orders of magnitude that of software based simulators running on Intel Core 2 and i7 CPUs at frequencies higher than 2GHz. In addition, we have developed a fully parametric soft IP core, expressed in synthesizable VHDL, that can be used to generate readily synthesizable HDL descriptions of the most appropriate SoC architecture for a given biomodel (described in SBML) and specified user parameters (N, mode of operation). Finally, we have developed a Hardware Abstraction Layer (HAL) in Python which allows user applications running in a host PC to utilize seamlessly the SoC in the FPGA as a co-processor for efficient stochastic simulation.

 

Elias S. Manolakos is an associate Professor of Signal Processing Systems at the University of Athens and Director of the Multidisciplinary Program "Information Technologies in Medicine and Biology" (ITMB), organized in collaboration with the Biomedical Foundation of the Academy of Athens (BFRAA). Before returning to Greece (2004) he was with the ECE Dept. at Northeastern University, where he is currently an Adjunct Professor. While at Northeastern, he has directed the CDSP Research Center promoting industry-academia collaboration. His research interests include embedded systems, machine learning, parallel and distributed processing, and their application in computational systems biology, biological and environmental systems modeling and monitoring. His research has attracted substantial support from US and EU funding agencies. Elias Manolakos has earned his Ph.D. in Computer Engineering from University of Southern California, M.Sc. from University of Michigan, and the Diploma in Electrical Engineering from the National Technical University of Athens. He is a Senior Member of the IEEE.