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Home | Seminars and Symposia | Past seminars/symposia: Tuesday, May 6, 2008

DTC Science and Technology Innovators Lecture Series

The Semiconductor Industry's Nanoelectronics Research Initiative: Motivation and Challenges

by

Jeff Welser
Director, SRC Nanoelectronics Research Initiative
IBM Almaden Research Center

Tuesday, May 6, 2008
4:30 p.m. reception
(Upson Room)
5:00 p.m. seminar

101 Walter Library

Welser flyer

Download flyer (PDF 337 KB)

In recent generations of CMOS technology, exponentially increasing power density due to leakage currents as well as active switching energy of these nanoscale transistors is limiting our ability to reap the historical benefits of continued scaling. As the ultimate limits to CMOS scaling are getting closer, completely new approaches in emerging areas in electronics at the nanoscale need to be explored. Recognizing this critical challenge, the Nanoelectronics Research Initiative (NRI) was chartered in 2005 by a consortium of Semiconductor Industry Association (SIA) member companies to develop and administer a university-based program to address this issue.

Welser

NRI Mission: Demonstrate novel computing devices capable of replacing the CMOS FET as a logic switch in the 2020 timeframe.


In this talk, the scaling challenges facing current CMOS technology will be discussed, along with the ultimate limits for charge-switching based devices. From this motivation, the current status of the NRI program will be discussed, with an overview of the current research topics being investigated at the NRI centers.

 

Jeff Welser received his PhD in Electrical Engineering from Stanford University in 1995, and joined IBM's Research Division at the T.J. Watson Research Center. His graduate work was focused on utilizing strained-Si and SiGe materials for FET devices. Since joining IBM, Jeff has worked on a variety of novel devices, including nano-crystal and quantum-dot memories, vertical-FET DRAM, and Si-based optical detectors, and eventually took over managing the Novel Silicon Device group at Watson. He was also working at the time as an adjunct professor at Columbia University, teaching semiconductor device physics. In 2000, Jeff took an assignment in Technology group headquarters, and then joined the Microelectronics division in 2001, as project manager for the high-performance CMOS device design groups. In May 2003, was named Director of high-performance SOI and BEOL technology development, in addition to his continuing work as the IBM Management Committee Member for the Sony, Toshiba, and AMD development alliances. In late 2003, Jeff returned to the Research division as the Director Next Generation Technology Components. He worked on the Next Generation Computing project, looking at technology, hardware, and software components for systems in the 2008-2012 timeframe, and in 2005, the group moved into IBM Systems and Technology Group to focus on developing early system prototypes. Recently, Jeff was named the Director of the Nanoelectronics Research Initiative, on assignment to the Semiconductor Research Corporation (SRC), directing university-based research on future nanoscale logic devices to replace the CMOS transistor in the 2020 timeframe, He is based at the IBM Almaden Research Center in San Jose, CA.